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15.0 > Academic > DRAMsim3 (1.0.0)

  DRAMsim3 models the timing paramaters and memory controller behavior
for several DRAM protocols such as DDR3, DDR4, LPDDR3, LPDDR4, GDDR5,
GDDR6, HBM, HMC, STT-MRAM. It is implemented in C++ as an objected
oriented model that includes a parameterized DRAM bank model, DRAM
controllers, command queues and system-level interfaces to interact
with a CPU simulator (GEM5, ZSim) or trace workloads. It is designed
to be accurate, portable and parallel.

Maintained by: William PC
Keywords: memory simulator,memory modeling,simulation
ChangeLog: DRAMsim3

Homepage:
https://github.com/umd-memsys/DRAMsim3

Source Downloads:
DRAMsim3-1.0.0.tar.gz (ae5079649cac0987236939b13c28e51e)

Download SlackBuild:
DRAMsim3.tar.gz
DRAMsim3.tar.gz.asc (FAQ)

(the SlackBuild does not include the source)

Individual Files:
DRAMsim3.SlackBuild
DRAMsim3.info
README
slack-desc

Validated for Slackware 15.0

See our HOWTO for instructions on how to use the contents of this repository.

Access to the repository is available via:
ftp git cgit http rsync

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