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15.0 > Academic > xschem (3.4.7)

Xschem is a schematic capture program, it allows creation of
hierarchical representation of circuits with a top down approach . By
focusing on interfaces, hierarchy and instance properties a complex
system can be described in terms of simpler building blocks.
A VHDL or Verilog or Spice netlist can be generated from the drawn
schematic, allowing the simulation of the circuit.
Key feature of the program is its drawing engine written in C and using
directly the Xlib drawing primitives; this gives very good speed
performance, even on very big circuits.
The user interface is built with the Tcl-Tk toolkit, tcl is
also the extension language used.

- hierarchical schematic drawings, no limits on size
- any object in the schematic can have any sort of properties
(generic in VHDL, parameters in Spice or Verilog)
- new Spice/Verilog primitives can be created, and the netlist format
can be defined by the user
- back annotation for variety of device parameters in a hierarchical
fashion when combined with ngspice simulator.
- built-in waveform viewer in the schematic with back-annotation
dynamically linken with the "b" cursor
- ngspice integration and other simulator as well
- TCP interface to BeSpice wave
- tcl extension language allows the creation of scripts.
any user command in the drawing window has an associated tcl comand
- VHDL / Verilog / Spice netlist, ready for simulation
- Behavioral VHDL / Verilog code can be embedded as one of the
properties of the schematic block.

Maintained by: A. Tomasini
Keywords: xschem
ChangeLog: xschem

Homepage:
https://xschem.sourceforge.io/stefan/index.html

Source Downloads:
xschem-3.4.7.tar.gz (42cbb4ca2a882a001cedd61d869466a1)

Download SlackBuild:
xschem.tar.gz
xschem.tar.gz.asc (FAQ)

(the SlackBuild does not include the source)

Validated for Slackware 15.0

See our HOWTO for instructions on how to use the contents of this repository.

Access to the repository is available via:
ftp git cgit http rsync

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